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Raspberry Pi /RP2350 /SIO /GPIO_HI_OE

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Interpret as GPIO_HI_OE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0GPIO0 (USB_DP)USB_DP 0 (USB_DM)USB_DM 0 (QSPI_SCK)QSPI_SCK 0 (QSPI_CSN)QSPI_CSN 0QSPI_SD

Description

Output enable value for GPIO32…47, QSPI IOs and USB pins.

Write output enable (1/0 -> output/input). Reading back gives the last value written. If core 0 and core 1 both write to GPIO_HI_OE simultaneously (or to a SET/CLR/XOR alias), the result is as though the write from core 0 took place first, and the write from core 1 was then applied to that intermediate result.

In the Non-secure SIO, Secure-only GPIOs (as per ACCESSCTRL) ignore writes, and their output status reads back as zero. This is also true for SET/CLR/XOR aliases of this register.

Fields

GPIO

Output enable value for GPIO32…47
USB_DP

Output enable value for USB D+ pin
USB_DM

Output enable value for USB D- pin
QSPI_SCK

Output enable value for QSPI SCK pin
QSPI_CSN

Output enable value for QSPI CSn pin
QSPI_SD

Output enable value for QSPI SD0 (MOSI), SD1 (MISO), SD2 and SD3 pins

Links

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Register License

Copyright © 2024 Raspberry Pi Ltd.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data